Packaging structure for improving packaging thermal uniformity of SiC power device
The utility model discloses a packaging structure for improving packaging thermal uniformity of a SiC power device. The packaging structure comprises a first SiC chip, a second SiC chip, a first DBC upper copper layer, a second DBC upper copper layer, a third DBC upper copper layer, a DBC ceramic la...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The utility model discloses a packaging structure for improving packaging thermal uniformity of a SiC power device. The packaging structure comprises a first SiC chip, a second SiC chip, a first DBC upper copper layer, a second DBC upper copper layer, a third DBC upper copper layer, a DBC ceramic layer, a DBC lower copper layer and a substrate. The surfaces of the DBC upper copper layer I, the DBC upper copper layer II, the DBC upper copper layer III and the DBC lower copper layer are all etched with hollow-out structure solder layers; the upper surface of the SiC chip I is connected with the hollow-out structure solder layer on the DBC upper copper layer II through a bonding aluminum-clad copper strip; the upper surface of the second SiC chip is connected with the hollow-out structure solder layer on the third DBC upper copper layer through a bonding aluminum-clad copper strip. The packaging structure is uniform in heat dissipation and high in reliability, the bonding aluminum-clad copper strips are good in |
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