SPI flash memory

The utility model discloses an SPI flash memory. The SPI flash memory comprises a bottom plate, a lead frame, a plurality of laminated PCBs, a plurality of SPI flash memory chips and an encapsulationlayer, wherein the lead frame is arranged on the bottom plate, and a plurality of pins used for being connected with external signals are arranged on the lead frame. The plurality of laminated PCBs are vertically stacked above the bottom plate from top to bottom and are all provided with a plurality of leads. Wherein the plurality of SPI flash memory chips are respectively arranged on the plurality of laminated PCBs, and the pins of the four SPI flash memory chips are respectively and electrically connected with the plurality of leads on the laminated PCBs. The multiple laminated PCBs, the bottom plate and the multiple SPI flash memory chips are encapsulated in the encapsulation layer, the pins and the leads are partially exposed out of the encapsulation layer, and the pins are electrically connected through a met