Implement circuit of scan chain in integrated circuit's resource able to programme

The utility model describes a be used for implement circuit of scan chain in integrated circuit's resource able to programme. The circuit including be configured as receive incoming signal and based on incoming signal generates output signal's component able to programme, be configured as...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: RAFAEL C. CAMAROTA, BENJAMIN S. DEVLIN
Format: Patent
Sprache:chi ; eng
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Beschreibung
Zusammenfassung:The utility model describes a be used for implement circuit of scan chain in integrated circuit's resource able to programme. The circuit including be configured as receive incoming signal and based on incoming signal generates output signal's component able to programme, be configured as first input department receive by the output signal that component able to programme generated to at second input receipt scan chain incoming signal's selection circuit, wherein selection circuit generates selected output signal in response to selection circuit control signal, and be configured as the receipt selection circuit's selected output signal's register. The circuit and method for is useful very much in using emulation / prototype execution debugging. The circuit and method for allows the user to found the high -speed scanning chain in FPGA, and needn't consume otherwise additionally arranging or the interconnection resource of will needing. 描述了种用于在集成电路的可编程资源中实施扫描链的电路。所述电路包括被配置为接收输入信号并基于所述输入信号生成输出信号的可编程元件;被配置为在第输入处接