Broadband multi -phase clock generating circuit

The utility model relates to a broadband multi -phase clock generating circuit, include: the ring oscillator circuit includes a plurality of delay -level of cascading the ground coupling with the opposition feedback, wherein every delay -level includes the adjustable resistance circuit, the phase comparator circuit, be configured as the execution by phase comparison between two different phase places of the delay -level output of two correspondences of ring oscillator circuit, and amplifier circuit, be configured as in response to phase comparison and generate control signal, wherein control signal is fed back with control the ring oscillator circuit in the delay -level the resistance of adjustable resistance circuit. 本实用新型涉及种宽带多相时钟生成电路，包括：环形振荡器电路，包括以反相反馈级联地耦合的多个延迟级；其中每个延迟级包括可变电阻电路；相位比较器电路，被配置为执行在由所述环形振荡器电路的两个对应的延迟级输出的两个不同相位之间的相位比较；以及放大器电路，被配置为响应于所述相位比较而生成控制信号，其中所述控制信号被反馈以控制所述环形振荡器电路的所述延迟级中的所述可变电阻电路的电阻。