Signal setting -up time control circuit and because dynamic memory of this circuit

The utility model relates to a signal setting -up time control circuit and because dynamic memory of this circuit, including first delay cell, its special character lies in, still include second delay cell and multiple selector, the word line is chosen signal wlmimic to divide into two the tunnel th...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: DUAN HUIFU, ALEXANDER
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The utility model relates to a signal setting -up time control circuit and because dynamic memory of this circuit, including first delay cell, its special character lies in, still include second delay cell and multiple selector, the word line is chosen signal wlmimic to divide into two the tunnel through first delay cell, article one, the direct output signal SA_en1 in route, the second route is through second delay cell output signal SA_en2, signal SA_en1 and signal SA_en2 all export sensitive amplifier enable signal SA_en through the selection of multiple selector, the gating of signal refresh control multiple selector. The utility model provides a current dynamic memory all adopt the same signal setting -up time in the activation operation when refreshing the operation, the short technical problem of storage hold time, the utility model discloses dynamic memory's data hold time has effectively been improved. 本实用新型涉及种信号建立时间控制电路及基于该电路的动态存储器,包括第延迟单元,其特殊之处在于,还包括第二延迟单元和多路选择器,字线被选中信号wlmimic通过第延迟单元分为两路,第条路径直接输出信号