Analog testing device capable of improving debugging efficiency of digital control system

The utility model relates an analog testing device, and particularly to an analog testing device capable of improving debugging efficiency of a digital control system. The analog testing device comprises a lower computer, an upper computer, a netting twine and a cable, wherein the lower computer com...

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Bibliographische Detailangaben
Hauptverfasser:	JIAO HUANHUAN, ZHANG LIGANG, JIANG RUN, ZHANG SHUAI, XU WEI, CHANG XIANGYANG
Format:	Patent
Sprache:	eng
Schlagworte:	CONTROL OR REGULATING SYSTEMS IN GENERAL CONTROLLING FUNCTIONAL ELEMENTS OF SUCH SYSTEMS GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS ORELEMENTS NUCLEAR ENGINEERING NUCLEAR PHYSICS NUCLEAR POWER PLANT PHYSICS REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGYGENERATION, TRANSMISSION OR DISTRIBUTION REGULATING TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINSTCLIMATE CHANGE
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Beschreibung
Zusammenfassung:	The utility model relates an analog testing device, and particularly to an analog testing device capable of improving debugging efficiency of a digital control system. The analog testing device comprises a lower computer, an upper computer, a netting twine and a cable, wherein the lower computer comprises a plurality of small cabinets. Each small cabinet is arranged on a portable testing trolley and is configured in a workshop according to the requirement. Each small cabinet is internally provided with a switch, an IO card and a main processor. The switch is connected with the processor through the netting twine. The main processor is connected with the IO card through a PCI bus. According to the analog testing device, automatic technology is adopted. Centralized control and dispersed analog for input signals are realized. Output signals are tested and a debugging efficiency can be improved.