Power semiconductor packaging structure

The utility model relates to the technical field of semiconductor packaging structures, and discloses a power semiconductor packaging structure, comprising a ceramic substrate, at least one power semiconductor chip, a lead frame and a packaging colloid, wherein the upper surface of the ceramic substrate is provided with at least a first metal layer, the back surface of the power semiconductor chip is adhered onto the first metal layer, and pins on the front surface of the power semiconductor chip are connected through leads; the lead frame is provided with a plurality of pins, and different pins of the lead frame are connected with different pins of the power semiconductor chip through leads; and the packaging colloid wraps parts of each power semiconductor chip, each lead and each pin. The embodiment of the utility model provides the power semiconductor structure, can well dissipate heat as the back surface of the power semiconductor chip is adhered onto the first metal layer, and is a good solution to the p