Syndrome computing circuit used in RS error-correcting code decoder
The utility model provides a syndrome computing circuit used in an RS error-correcting code decoder, which comprises a data memory, a multiplier and an adder; the data memory at least comprises 2t memory addresses and is used for storing 2t data units; the multiplier is used for multiplying the data...
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| Format: | Patent |
| Sprache: | chi ; eng |
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| Zusammenfassung: | The utility model provides a syndrome computing circuit used in an RS error-correcting code decoder, which comprises a data memory, a multiplier and an adder; the data memory at least comprises 2t memory addresses and is used for storing 2t data units; the multiplier is used for multiplying the data unit of the ith memory address read from the data memory with alpha i in sequence for obtaining the multiplication result, wherein i refers to an integer, which meets the following relationship: 1 |
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