Method of manufacturing flash memory device
A method for fabricating a NAND flash memory device is provided to broaden the surface area on a dielectric layer formed on a floating gate by forming a three-dimensional floating gate so that the surface area of the floating gate is extended. After a tunnel oxide layer(104) and a conductive layer a...
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Format: | Patent |
Sprache: | eng |
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Zusammenfassung: | A method for fabricating a NAND flash memory device is provided to broaden the surface area on a dielectric layer formed on a floating gate by forming a three-dimensional floating gate so that the surface area of the floating gate is extended. After a tunnel oxide layer(104) and a conductive layer are deposited on a semiconductor substrate(100) having an isolation layer, the conductive layer is etched. The conductive layer may be made of a doped polysilicon layer, W, WN, Ti, TiN, Pt, Ruby, RuO2, Ir, IrO2, or Al. After an oxide layer is formed to fill a gap between the conductive layers, a polishing process is performed until the conductive layer is exposed. After the center part of the conductive layer is etched to form a recess pattern(110), the oxide layer is removed to form a three-dimensional floating gate. After a dielectric layer is formed on the resultant structure and a polysilicon layer, a metal layer and a hard mask layer are sequentially formed, a patterning process is performed to form a contact gate. |
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