Method for manufacturing underlaying material and semiconductor underlaying material

A substrate material including a Si-containing substrate and an insulating region that is resistant to Ge diffusion present atop the Si-containing substrate. The substrate material further includes a substantially relaxed SiGe alloy layer present atop the insulating region, wherein the substantially relaxed SiGe alloy layer has a planar defect density from about 5000 defects/cm−2 or less. The substrate material may be employed in a heterostructure, in which a strained Si layer is present atop the substantially relaxed SiGe alloy layer of the substrate material.