Power reduction in a memory bus interface

A technique includes amplifying data signals from a memory bus interface. The amplified data signals are sampled, and the amplifier is selectively disabled in response to the absence of a predetermined operation occurring over the memory bus. In some embodiments of the invention, the amplification m...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: YOSEF NOAM, WILCOX JEFFREY
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A technique includes amplifying data signals from a memory bus interface. The amplified data signals are sampled, and the amplifier is selectively disabled in response to the absence of a predetermined operation occurring over the memory bus. In some embodiments of the invention, the amplification may be selectively enabled in response to the beginning of the predetermined operation over the memory bus.