Low power cyclic A/D converter

一种低功率循环RSD ADC(20)，有单一RSD级(22)，该RSD级(22)接收模拟输入信号及剩余电压反馈信号之一，并把选出的那一个信号转换为数字输出信号。该RSD级(22)产生该剩余电压反馈信号。第一开关(32)连接在转换器输入端(30)与RSD级(22)的输入之间，用于把模拟输入加到RSD级(22)。第二开关(52)连接在RSD级(22)的输出与RSD级的输入之间。该RSD级(22)包括一对分别预先确定高和低的电压的比较器(34、36)。逻辑电路(38)根据这些输出，产生数字输出信号。 A low power cyclic RSD analog to digital converter (20) has a single RSD stage (22) that receives one of an analog input signal and a residual voltage feedback signal and converts the one selected signal to a digital output signal. The RSD stage (22) generates the residue voltage feedback signal. A first switch (32) is connected between a converter input terminal (30) and an input terminal of the RSD stage (22) for applying the analog input signal to the RSD stage input terminal. A second switch (52) is connected between an output terminal of the RSD stage (22) and the input terminal of the RSD stage. When the first switch (32) is closed, the second switch (52) is open so that the analog input signal is input to the RSD stage (22), and when the first switch (32) is open, the second switch (52) is closed so that the residual voltage feedback signal is input to the RSD stage (22). The RSD stage (22) includes a pair of comparators (34, 36) that compare the selected one of the analog input signal and the residual voltage feedback signal to predetermined high and low voltages, respectively. A logic circuit (38) connected to the comparators (34, 36) receives their outputs and generates the digital output signal based on these outputs. Use of a single stage and only two comparators conserves chip real estate.