Integrated coil inductors for ic devices

本发明提供一种用于制造被集成于半导体芯片中的螺线管电感器的手段。螺线管线圈被部分地嵌入一被蚀刻在芯片基板内的深井中。线圈未被嵌入的部分被制造当作后段制程(BEOL)金属化层的一部分。这允许螺线管线圈的大截面积区域，于是减少圈到圈的电容耦合。因为本发明的螺线管线圈有大直径的截面，所以制成的线圈具有大电感值然而却只占用较小的芯片区域。制造过程包含在所有前段处理(FEOL)步骤完成后在基板上蚀刻深凹洞；将该凹洞衬以介电质，随后制造线圈部分，该线圈部分将通过掩模利用导电材料金属沉积被嵌入；沉积介电质及利用化学机械抛光法(CMP)将该介电质平坦化。在平坦化之后，其余部分螺线管线圈的制造是作为BEOL中金属化的一部分(即如BEOL的线/通路孔)。为了进一步增加螺线管线圈的截面积，部分螺线管线圈可以在BEOL层上部通过掩模以电沉积来建立。 A means for fabrication of solenoidal inductors integrated in a semiconductor chip is provided. The solenoidal coil is partially embedded in a deep well etched into the chip substrate. The non-embedded part of the coil is fabricated as part of the BEOL metallization layers. This allows for a large cross-sectional area of the solenoid turns, thus reducing the turn-to-turn capacitive coupling. Because the solenoidal coils of this invention have a large diameter cross-section, the coil can be made with a large inductance value and yet occupy a small area of the chip. The fabrication process includes etching of a deep cavity in the substrate after all the FEOL steps are completed; lining said cavity with a dielectric followed by fabrication of the part of the coil that will be embedded by deposition of a conductive material metal through a mask; deposition of dielectric and planarization of same by CMP. After planarization the fabrication of the remaining part of the solenoidal coil is fabricated as part of the metallization in the BEOL (i.e. as line/vias of the BEOL). To further increase the cross section of the solenoidal coil part of it may be built by electrodeposition through a mask on top of the BEOL layers.