Mark design method for integrated circuit layout of semiconductor chip

This invention relates to a method for IC layont overlay mark design on semiconductor chips including the following steps: forming a first double outer bars on one direction (x or y) on the first layer first, then to form second double outer bars on an other direction (y or x) on the second layer an...

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1. Verfasser: YILI GU
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:This invention relates to a method for IC layont overlay mark design on semiconductor chips including the following steps: forming a first double outer bars on one direction (x or y) on the first layer first, then to form second double outer bars on an other direction (y or x) on the second layer and finally to form a set of inner bars on the third layer to realize the aim of overlaying among multiplayer in a semiconductor. 本发明是关于一种用于半导体芯片进行集成电路布局(Layout)的套准记号设计(Overlay Mark Design)的方法,包括了下列步骤:首先在第一层形成一个方向(X或Y)的第一双外部套准记号条(Outer Bar),而后在第二层形成另一个方向(Y或X)的第二双外部套准记号条(Outer Bar)。最后在第三层形成一套内部套准记号条(Inner Bar),藉以达到于半导体中进行多层间套准的目的。