Process for making shallow slot and deep slot isolation arrangement
The invention is a method to make a shallow trench (ST) and deep trench (DT) isolation construction, combined with chemical mechanical polishing (CMP) method and other depositing, photoetching and etching techniques to make an isolation construction with a high-flatness fillings surface. It can prov...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention is a method to make a shallow trench (ST) and deep trench (DT) isolation construction, combined with chemical mechanical polishing (CMP) method and other depositing, photoetching and etching techniques to make an isolation construction with a high-flatness fillings surface. It can provide larger process window when photoetching deep trench. It can heighten the integrated degree of component, especially applied to bipolar complementary metal oxide semiconductor (BiCMOS) transistor and CMOS transistor. It can reduce capacitance value of BiCMOS transistor, especially beneficial to make high frequency integrated circuit (IC) components.
一种浅槽(Shallow Trench;ST)与深槽(Deep Trench;DT)隔离(isolation)结构的制造方法,结合化学机械抛光(Chemical Mechanical Polishing;CMP)法和其它沉积、光刻与蚀刻的工艺,来制造具有高平坦度填充物表面的隔离结构。本发明浅槽与深槽隔离结构的制造方法在进行深槽的光刻工艺时,可提供较大的工艺界面(process window)。本发明可增加元件的集成度,特别适用于双极互补型金属氧化物半导体(Bipolar Complementary Metal OxideSemiconductor;BiCMOS)晶体管和CMOS晶体管。本发明可降低BiCMOS晶体管的电容值,特别有利于高频的集成电路(IC)元件的制作。 |
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