LCD board

The invention is an active matrix LCD board with a pair of substrates and the liquid crystal limited between the substrates: the opaque signal leads and opaque linkers form in the frame region of onesubstrate, and the film transistor and pixel electrode together with the scanning and data signal lin...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser:	WATANABE MAKOTO, SHIGA SHUNSUKE
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	BASIC ELECTRIC ELEMENTS DEVICES OR ARRANGEMENTS, THE OPTICAL OPERATION OF WHICH ISMODIFIED BY CHANGING THE OPTICAL PROPERTIES OF THE MEDIUM OF THEDEVICES OR ARRANGEMENTS FOR THE CONTROL OF THE INTENSITY,COLOUR, PHASE, POLARISATION OR DIRECTION OF LIGHT, e.g.SWITCHING, GATING, MODULATING OR DEMODULATING ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY FREQUENCY-CHANGING NON-LINEAR OPTICS OPTICAL ANALOGUE/DIGITAL CONVERTERS OPTICAL LOGIC ELEMENTS OPTICS PHYSICS SEMICONDUCTOR DEVICES TECHNIQUES OR PROCEDURES FOR THE OPERATION THEREOF
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Beschreibung
Zusammenfassung:	The invention is an active matrix LCD board with a pair of substrates and the liquid crystal limited between the substrates: the opaque signal leads and opaque linkers form in the frame region of onesubstrate, and the film transistor and pixel electrode together with the scanning and data signal lines form in the substrate; as the sealing layer forms along the preset route in the frame region, the maker checks the negative vernier which forms in the linkers to determine if the sealing layer extends along the preset route before assembly, improving the reliability of the product and not sacrificing the pixel matrix. 一种有源矩阵液晶显示板，具有一对衬底结构(21a、21b)和限制在衬底结构(21a、21b)之间的空间的液晶(21c)；不透明信号引线(36)和不透明连接器(35'#-[a1]、35'#-[a2]、35'#-[b1]、35'#-[b2]、37'#-[a1]、37'#-[a2]、37'#-[b1]、37'#-[b2]、38'#-[a1]、38'#-[a2]、38'#-[b1]、38'#-[b2])在一个衬底结构(21a、21b)的框架区域中形成，而薄膜晶体管(26)和象素电极与扫描和数据信号线(22)一起在该衬底结构中形成；当密封层(11)在框架区域(30c)中沿预定的路径形成时，制造者检查在连接器(35'#-[a1]、35'#-[a2]、35'#-[b1]、35'#-[b2]、37'#-[a1]、37'#-[a2]、37'#-[b1]、37'#-[b2]、38'#-[a1]、38'#-[a2]、38'#-[b1]、38'#-[b2])中形成的负游标(1)，以确定密封层(11)在装配之前是否沿预定的路径延伸，以致提高产品的可靠性而不牺牲象素矩阵。