MOS transistor assembly block

An MOS transistor has a trench structure in a semiconductor region. The avalanche breakdown region of the MOS is formed in an end region (30u) or an under region of the trench, especially at the floor (30b). An especially low switching-on resistance of the transistor is thus obtained. An Independent...

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Bibliographische Detailangaben
Hauptverfasser: F. HOELLER, M. ZENGDER, R. LANTIR
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:An MOS transistor has a trench structure in a semiconductor region. The avalanche breakdown region of the MOS is formed in an end region (30u) or an under region of the trench, especially at the floor (30b). An especially low switching-on resistance of the transistor is thus obtained. An Independent claim is also included for an MOS transistor as above in which there is a maximum dopant concentration (K) between the source (S) and drain (D) regions near the isolation region (GOX).