Buffer configuration and chip

The present invention is buffer configuration and chip thereof. Several buffers are configured on one chip, and the chip has signal source end and X output soldering pads, where X is a positive integral. The configuration method includes configuring one N-th layer buffer between two output soldering...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	YOUMING QU, YONGZHONG ZHANG
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES
Online-Zugang:	Volltext bestellen
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!