D/A converter and conversion method with compensation to reduce clock jitter

A digital-analog conversion method which can decrease jitter phenomenon when operation is carried on with two clock messages in different preriod includes the following steps: monitoring phase relation between two clock messages: starting transmission of multiset of wave form sampling stored in advance corresponding to each rising wave range of the first clock message and there will be a phase difference existing between any two sets of wave form sampling; exporting wave form sampling for each set corresponding to rising wave range of the second clock message and convertnig one set selected out from multiset of wave form sampling stored in advance according to phase relation into analog message. A digital-analog converter is composed of phase monitor, multiple wave form sampling mater, multiplexer and a digital-analog conversion circuit.