Memory reference instruction for micro engine used in multithreaded parallel processor architecture

A processor such as a parallel hardware-based multithreaded processor ( 12 ) is described. The processor ( 12 ) can execute a computer instruction that is a branch instruction that causes an instruction sequence in the processor to branch on any specified bit of a register ( 80, 78, 76 b) being set...

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Bibliographische Detailangaben
Hauptverfasser: G. WOLRICH, M.J. ADILETTA, W. WHEELER
Format: Patent
Sprache:eng
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Zusammenfassung:A processor such as a parallel hardware-based multithreaded processor ( 12 ) is described. The processor ( 12 ) can execute a computer instruction that is a branch instruction that causes an instruction sequence in the processor to branch on any specified bit of a register ( 80, 78, 76 b) being set or cleared and which specifies which bit of the specified register to use as a branch control bit.