Eche eliminator for asymmetrical digital client loop
An efficient echo eliminator for asymmetric digital client circuits is composed of a frequency domain updating unit, a remote signal estimator and a time domain eliminator. It is suitable for VLS IC design.
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | An efficient echo eliminator for asymmetric digital client circuits is composed of a frequency domain updating unit, a remote signal estimator and a time domain eliminator. It is suitable for VLS IC design. |
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