High density area array solder microjoining interconnect structure and fabrication method
A system for interconnecting a set of device chips by means of an array of microjoints disposed on an interconnect carrier is taught. The carrier is provided with a dense array of microjoint receptacles with an adhesion layer, barrier layer and a noble metal layer; the device wafers are fabricated w...
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| creator | MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK |
| description | A system for interconnecting a set of device chips by means of an array of microjoints disposed on an interconnect carrier is taught. The carrier is provided with a dense array of microjoint receptacles with an adhesion layer, barrier layer and a noble metal layer; the device wafers are fabricated with an array of microjoining pads including an adhesion layer, barrier layer and a fusible solder layer with pads being located at matching locations in reference to the barrier receptacles; the device chips are joined to the carrier through the microjoint arrays resulting in interconnections capable of very high input/output density and inter-chip wiring density. |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN1309038CC</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN1309038CC</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN1309038CC3</originalsourceid><addsrcrecordid>eNqNyjEOwjAMQNEuDAi4gy-AVJQF5gjUiYmFqTKJ2xq1duW4Q28PAwdg-W_52-rZcD9AJinsK6ARfmO4QtExk8HEyfStLCw9sDhZUhFKDsVtSb4YAUqGDl_GCZ1VYCIfNO-rTYdjocPPXQW36yM2R5q1pTJjIiFv4_0U6ksdzjGGP5YP0Os7NA</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>High density area array solder microjoining interconnect structure and fabrication method</title><source>esp@cenet</source><creator>MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK</creator><creatorcontrib>MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK</creatorcontrib><description>A system for interconnecting a set of device chips by means of an array of microjoints disposed on an interconnect carrier is taught. The carrier is provided with a dense array of microjoint receptacles with an adhesion layer, barrier layer and a noble metal layer; the device wafers are fabricated with an array of microjoining pads including an adhesion layer, barrier layer and a fusible solder layer with pads being located at matching locations in reference to the barrier receptacles; the device chips are joined to the carrier through the microjoint arrays resulting in interconnections capable of very high input/output density and inter-chip wiring density.</description><language>eng</language><subject>BASIC ELECTRIC ELEMENTS ; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS ; PRINTED CIRCUITS ; SEMICONDUCTOR DEVICES</subject><creationdate>2007</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070404&DB=EPODOC&CC=CN&NR=1309038C$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,780,885,25564,76547</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20070404&DB=EPODOC&CC=CN&NR=1309038C$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK</creatorcontrib><title>High density area array solder microjoining interconnect structure and fabrication method</title><description>A system for interconnecting a set of device chips by means of an array of microjoints disposed on an interconnect carrier is taught. The carrier is provided with a dense array of microjoint receptacles with an adhesion layer, barrier layer and a noble metal layer; the device wafers are fabricated with an array of microjoining pads including an adhesion layer, barrier layer and a fusible solder layer with pads being located at matching locations in reference to the barrier receptacles; the device chips are joined to the carrier through the microjoint arrays resulting in interconnections capable of very high input/output density and inter-chip wiring density.</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</subject><subject>PRINTED CIRCUITS</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2007</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNqNyjEOwjAMQNEuDAi4gy-AVJQF5gjUiYmFqTKJ2xq1duW4Q28PAwdg-W_52-rZcD9AJinsK6ARfmO4QtExk8HEyfStLCw9sDhZUhFKDsVtSb4YAUqGDl_GCZ1VYCIfNO-rTYdjocPPXQW36yM2R5q1pTJjIiFv4_0U6ksdzjGGP5YP0Os7NA</recordid><startdate>20070404</startdate><enddate>20070404</enddate><creator>MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK</creator><scope>EVB</scope></search><sort><creationdate>20070404</creationdate><title>High density area array solder microjoining interconnect structure and fabrication method</title><author>MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN1309038CC3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>eng</language><creationdate>2007</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS</topic><topic>PRINTED CIRCUITS</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>MAGERLEIN JOHN HAROLD,PETRARCA KEVIN SHAWN,PURUSHOTHAMAN SAMPATH,SAMBUCETTI CARLOS JUAN,VOLANT RICHARD PAUL,WALKER GEORGE FREDERICK</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>High density area array solder microjoining interconnect structure and fabrication method</title><date>2007-04-04</date><risdate>2007</risdate><abstract>A system for interconnecting a set of device chips by means of an array of microjoints disposed on an interconnect carrier is taught. The carrier is provided with a dense array of microjoint receptacles with an adhesion layer, barrier layer and a noble metal layer; the device wafers are fabricated with an array of microjoining pads including an adhesion layer, barrier layer and a fusible solder layer with pads being located at matching locations in reference to the barrier receptacles; the device chips are joined to the carrier through the microjoint arrays resulting in interconnections capable of very high input/output density and inter-chip wiring density.</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR ELECTRICITY MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS PRINTED CIRCUITS SEMICONDUCTOR DEVICES |
| title | High density area array solder microjoining interconnect structure and fabrication method |
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