DRAM (Dynamic Random Access Memory) unit based on asymmetric source-drain contact oxide semiconductor transistor

The invention discloses a DRAM (Dynamic Random Access Memory) unit based on an asymmetric source-drain contact oxide semiconductor transistor, and belongs to the technical field of oxide semiconductors. The write-in transistor of the DRAM unit adopts the asymmetric source-drain contact oxide semicon...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: TONG ANYU, WU YANQING, HUANG RU, HU QIANLAN
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:The invention discloses a DRAM (Dynamic Random Access Memory) unit based on an asymmetric source-drain contact oxide semiconductor transistor, and belongs to the technical field of oxide semiconductors. The write-in transistor of the DRAM unit adopts the asymmetric source-drain contact oxide semiconductor transistor, the source end of the write-in transistor is in ohmic contact with the channel layer to ensure good electron injection in an on state, and the drain end of the write-in transistor is in Schottky contact with the channel layer to reduce the leakage current of a DRAM unit device in a holding state and improve the reliability of the DRAM unit device. Therefore, the device has an ultra-high write-in speed and ultra-long retention time, and the performance of the DRAM is favorably improved. 本发明公开了一种基于非对称源漏接触氧化物半导体晶体管的DRAM单元,属于氧化物半导体技术领域。本发明DRAM单元的写入晶体管采用非对称源漏接触氧化物半导体晶体管,所述写入晶体管的源端与沟道层采用欧姆接触,保证开态时良好的电子注入,所述写入晶体管的漏端与沟道层采用肖特基接触,降低保持状态下DRAM单元器件的泄漏电流,使得器件兼顾超快写入速度和超长保持时间,本发明有利于DRAM性能提升。