High-precision delay scheme based on FPGA and implementation method
The invention discloses a high-precision delay scheme based on an FPGA (Field Programmable Gate Array) and an implementation method, and belongs to the technical field of phased array beam forming. The scheme comprises two parts of'coarse delay and fine delay ', the coarse delay realizes i...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a high-precision delay scheme based on an FPGA (Field Programmable Gate Array) and an implementation method, and belongs to the technical field of phased array beam forming. The scheme comprises two parts of'coarse delay and fine delay ', the coarse delay realizes integral multiple delay through a trigger beating module, the fine delay realizes decimal multiple delay through a Farrow structure fractional delay filter, and the main modules comprise a data management module, an FIR filter module, a delay amount P parameter calculation module, a multiplication and accumulation module, a down-sampling module and the like. The FIR filter module is designed by using odd-even symmetry of coefficients, and a hierarchical assembly line method is adopted in additive operation, so that resources of a multiplier and an adder in the FPGA are effectively saved. According to the designed high-precision delay scheme, the delay amount can be flexibly adjusted, complex filter parameter calculation does |
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