Chip DFN packaging and process collaborative optimization method based on machine learning
The invention relates to the technical field of chip packaging processes, and discloses a chip DFN packaging and process collaborative optimization method based on machine learning, and the method comprises the steps: determining the quality indexes of the type of soldering paste, the thickness of a...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to the technical field of chip packaging processes, and discloses a chip DFN packaging and process collaborative optimization method based on machine learning, and the method comprises the steps: determining the quality indexes of the type of soldering paste, the thickness of a PAD welding layer, the thickness of a lower surface welding layer of a chip, and the type of a chip material through a centesimal weighting evaluation method of a Taguchi orthogonal test and a range analysis method of a signal-to-noise ratio; sorting and analyzing the range value R of each factor to obtain a comprehensive score, and further optimizing the optimal DFN packaging parameter combination of the Taguchi method through random forest machine learning and grid search; the reflow soldering temperature curve is optimized, and the optimal reflow soldering temperature curve is selected; according to the method, a series of problems caused by unreasonable material combination or structural design in existing chi |
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