Cross-gate cut gate link in semiconductor device

Techniques for forming an integrated circuit with gate dicing between pairs of adjacent semiconductor devices. At least one of those adjacent pairs of semiconductor devices includes a conductive link (e.g., a bridge) that cuts through the gates to connect adjacent gates together. In one example, adj...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
Hauptverfasser: RAMANATHAN MADHUSUDAN, KHANDELWAL NIKHIL, ACHARYA, SUNIL, LAKHANI ASHOK KUMAR, O 'BRIEN THOMAS, ENGEL CHRISTOPHER J, GULER LEONARD P, GANESAN KARTHIK, LUTHRA PRAVEEN KUMAR, ZHU, BIN, LIU SHIWEN
Format: Patent
Sprache:chi ; eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:Techniques for forming an integrated circuit with gate dicing between pairs of adjacent semiconductor devices. At least one of those adjacent pairs of semiconductor devices includes a conductive link (e.g., a bridge) that cuts through the gates to connect adjacent gates together. In one example, adjacent semiconductor devices each include a semiconductor region extending between a source region and a drain region, and a gate structure extending over the semiconductor region of the adjacent semiconductor device. There is a gate cut between each pair of adjacent semiconductor devices, thereby interrupting the gate structure and isolating the gate of one semiconductor device from the gate of the other semiconductor device. A conductive link extends over a given gate cut to electrically connect adjacent gate electrodes together. A dielectric layer extends over the bridged gate electrode and conductive link, and may have different thicknesses over those respective features. 用于形成具有邻近半导体器件对之间的栅极切割的集成电路的技术。那些邻近半导体器件对