Task processing method and chip

The embodiment of the invention provides a task processing method and a chip, and relates to the technical field of computers.The task processing method comprises the steps that all instructions in an instruction sequence used for achieving tasks are put into a plurality of instruction queues in one-to-one correspondence with a plurality of execution units respectively, according to a relation identifier corresponding to a limiting instruction of a queue head of a first instruction queue in the multiple instruction queues, determining a processing state of a second instruction queue depended by the first instruction queue in a data dependency relationship indicated by the relation identifier; taking out a limiting instruction corresponding to the relation identifier from the first instruction queue to execute an instruction after the limiting instruction; wherein the processing state is obtained by updating the relation identifier; and completing processing of the plurality of instruction queues to obtain a p