Data corruption tracking for memory reliability

Techniques related to improving memory reliability, for example, in the context of memory circuits with limited reliability features, are disclosed. In some embodiments, memory controller circuitry is configured to communicate via an interface with memory circuitry that supports link error detection. The memory controller circuitry may transmit a combination of data and parity for the first data block based on the corruption indicator, the combination of data and parity causing the memory circuitry to detect an uncorrectable write interface error. Subsequent reading of the location may thus cause an uncorrectable error indication. In some embodiments, this may advantageously allow the memory controller circuitry to propagate a corruption indicator in the memory circuitry as an uncorrectable error without the need to additionally track the indicator by the memory circuitry or memory controller. 公开了与例如在具有有限可靠性特征的存储器电路的上下文中提高存储器可靠性相关的技术。在一些实施方案中，存储器控制器电路系统被配置为经由接口与支持链路错误检测的存储器电路系统进行通信。该存储器控制器电路系统可以基于损坏指示符来发射针对第一