PCB via hole capacitive adjustment method and device and readable storage medium
The invention belongs to the field of PCB design, and particularly provides a via hole capacitive adjustment method and device of a PCB and a readable storage medium, and the method comprises the steps: calculating the characteristic impedance Z0 and inductance L0 of a signal line according to the t...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention belongs to the field of PCB design, and particularly provides a via hole capacitive adjustment method and device of a PCB and a readable storage medium, and the method comprises the steps: calculating the characteristic impedance Z0 and inductance L0 of a signal line according to the type of the microstrip signal line; calculating parasitic capacitance Cv and parasitic inductance Lv of the via hole; according to the characteristic impedance Z0 and the inductance L0 of the signal line and the parasitic capacitance Cv and the parasitic inductance Lv of the via hole, the size d0 of the anti-pad is obtained, and adjustment of the capacitance of the via hole is completed. According to the characteristic impedance Z0 and the inductance L0 of the signal line and the parasitic capacitance Cv and the parasitic inductance Lv of the via hole, the size of the anti-pad is changed, the capacitance of the via hole is changed, so that the abrupt change of the impedance of the via hole in the line is improved, a |
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