Low power adder circuit

The invention relates to a low power adder circuit. The circuit includes a first adder portion that receives a first input and a second input and adds the inputs to generate a first sum. The circuit also includes a second adder portion that receives the first input and the second input and adds the...

Ausführliche Beschreibung

Bibliographische Detailangaben

Hauptverfasser:	KANE ANAND SURESH, NARAYANASWAMY, RAVI
Format:	Patent
Sprache:	chi ; eng
Schlagworte:	CALCULATING COMPUTER SYSTEMS BASED ON SPECIFIC COMPUTATIONAL MODELS COMPUTING COUNTING ELECTRIC DIGITAL DATA PROCESSING PHYSICS
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