Complementary cascode inverter circuit

The invention discloses a complementary cascode inverter circuit which comprises an input end Vin, a control end Vc and an output end Vout, the input end Vin is electrically connected with grid electrodes of an NMOS (N-channel Metal Oxide Semiconductor) tube and a PMOS (P-channel Metal Oxide Semiconductor) tube, the control end Vc is equivalent voltage of a plurality of gate input grids, a substrate of the NMOS tube is grounded, and a substrate of the PMOS tube is connected with power supply voltage. According to the phase inverter designed by the invention, a nerve MOS tube in a complementary MOS tube phase inverter is replaced by a conventional MOS tube, so that not only can the power consumption be reduced, but also the threshold loss can be reduced, and experiments and analysis further prove that the designed circuit has the characteristics of simple structure, controllable threshold, low power consumption and the like; when the novel neural MOS tube inverter is applied to a multi-valued logic circuit, th