METHOD AND APPARATUS FOR CHARACTERIZING MEMORY
An example apparatus (100) includes converter circuitry (104A) having an output configured to be coupled to a first memory circuit (106A) from a plurality of memory circuits (106A, 106B, 106C), the converter circuitry (104A) configured to: receive a first instruction formatted with a unified protoco...
Gespeichert in:
| 1. Verfasser: | |
|---|---|
| Format: | Patent |
| Sprache: | chi ; eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| container_end_page | |
|---|---|
| container_issue | |
| container_start_page | |
| container_title | |
| container_volume | |
| creator | VARADARAJAN DEVANATHAN |
| description | An example apparatus (100) includes converter circuitry (104A) having an output configured to be coupled to a first memory circuit (106A) from a plurality of memory circuits (106A, 106B, 106C), the converter circuitry (104A) configured to: receive a first instruction formatted with a unified protocol; and convert the first instruction from the unified protocol to a protocol specific to the first memory circuit (106A); logic circuitry (108) having an input configured to be coupled to the first memory circuitry (106A), the logic circuitry (108) configured to: receive a first result of the first instruction from the first memory circuitry (106A); and in response to the second instruction, combining the first result with other results from a memory circuit of the plurality of memory circuits (106B, 106C) into an output.
一种示例设备(100)包括：转换器电路系统(104A)，该转换器电路系统(104A)具有被配置为耦合到来自多个存储器电路(106A、106B、106C)的第一存储器电路(106A)的输出，转换器电路系统(104A)被配置为：接收用统一协议格式化的第一指令；并且将第一指令从统一协议转换为特定于第一存储器电路(106A)的协议；逻辑电路系统(108)，该逻辑电路系统(108)具有被配置为耦合到 |
| format | Patent |
| fullrecord | <record><control><sourceid>epo_EVB</sourceid><recordid>TN_cdi_epo_espacenet_CN118591842A</recordid><sourceformat>XML</sourceformat><sourcesystem>PC</sourcesystem><sourcerecordid>CN118591842A</sourcerecordid><originalsourceid>FETCH-epo_espacenet_CN118591842A3</originalsourceid><addsrcrecordid>eNrjZNDzdQ3x8HdRcPQD4oAAxyDHkNBgBTf_IAVnDyDHOcQ1yDPK089dwdfV1z8okoeBNS0xpziVF0pzMyi6uYY4e-imFuTHpxYXJCan5qWWxDv7GRpamFoaWpgYORoTowYA5RMl1g</addsrcrecordid><sourcetype>Open Access Repository</sourcetype><iscdi>true</iscdi><recordtype>patent</recordtype></control><display><type>patent</type><title>METHOD AND APPARATUS FOR CHARACTERIZING MEMORY</title><source>esp@cenet</source><creator>VARADARAJAN DEVANATHAN</creator><creatorcontrib>VARADARAJAN DEVANATHAN</creatorcontrib><description>An example apparatus (100) includes converter circuitry (104A) having an output configured to be coupled to a first memory circuit (106A) from a plurality of memory circuits (106A, 106B, 106C), the converter circuitry (104A) configured to: receive a first instruction formatted with a unified protocol; and convert the first instruction from the unified protocol to a protocol specific to the first memory circuit (106A); logic circuitry (108) having an input configured to be coupled to the first memory circuitry (106A), the logic circuitry (108) configured to: receive a first result of the first instruction from the first memory circuitry (106A); and in response to the second instruction, combining the first result with other results from a memory circuit of the plurality of memory circuits (106B, 106C) into an output.
一种示例设备(100)包括：转换器电路系统(104A)，该转换器电路系统(104A)具有被配置为耦合到来自多个存储器电路(106A、106B、106C)的第一存储器电路(106A)的输出，转换器电路系统(104A)被配置为：接收用统一协议格式化的第一指令；并且将第一指令从统一协议转换为特定于第一存储器电路(106A)的协议；逻辑电路系统(108)，该逻辑电路系统(108)具有被配置为耦合到</description><language>chi ; eng</language><subject>INFORMATION STORAGE ; PHYSICS ; STATIC STORES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240903&DB=EPODOC&CC=CN&NR=118591842A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,778,883,25547,76298</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240903&DB=EPODOC&CC=CN&NR=118591842A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>VARADARAJAN DEVANATHAN</creatorcontrib><title>METHOD AND APPARATUS FOR CHARACTERIZING MEMORY</title><description>An example apparatus (100) includes converter circuitry (104A) having an output configured to be coupled to a first memory circuit (106A) from a plurality of memory circuits (106A, 106B, 106C), the converter circuitry (104A) configured to: receive a first instruction formatted with a unified protocol; and convert the first instruction from the unified protocol to a protocol specific to the first memory circuit (106A); logic circuitry (108) having an input configured to be coupled to the first memory circuitry (106A), the logic circuitry (108) configured to: receive a first result of the first instruction from the first memory circuitry (106A); and in response to the second instruction, combining the first result with other results from a memory circuit of the plurality of memory circuits (106B, 106C) into an output.
一种示例设备(100)包括：转换器电路系统(104A)，该转换器电路系统(104A)具有被配置为耦合到来自多个存储器电路(106A、106B、106C)的第一存储器电路(106A)的输出，转换器电路系统(104A)被配置为：接收用统一协议格式化的第一指令；并且将第一指令从统一协议转换为特定于第一存储器电路(106A)的协议；逻辑电路系统(108)，该逻辑电路系统(108)具有被配置为耦合到</description><subject>INFORMATION STORAGE</subject><subject>PHYSICS</subject><subject>STATIC STORES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZNDzdQ3x8HdRcPQD4oAAxyDHkNBgBTf_IAVnDyDHOcQ1yDPK089dwdfV1z8okoeBNS0xpziVF0pzMyi6uYY4e-imFuTHpxYXJCan5qWWxDv7GRpamFoaWpgYORoTowYA5RMl1g</recordid><startdate>20240903</startdate><enddate>20240903</enddate><creator>VARADARAJAN DEVANATHAN</creator><scope>EVB</scope></search><sort><creationdate>20240903</creationdate><title>METHOD AND APPARATUS FOR CHARACTERIZING MEMORY</title><author>VARADARAJAN DEVANATHAN</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN118591842A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>INFORMATION STORAGE</topic><topic>PHYSICS</topic><topic>STATIC STORES</topic><toplevel>online_resources</toplevel><creatorcontrib>VARADARAJAN DEVANATHAN</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>VARADARAJAN DEVANATHAN</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>METHOD AND APPARATUS FOR CHARACTERIZING MEMORY</title><date>2024-09-03</date><risdate>2024</risdate><abstract>An example apparatus (100) includes converter circuitry (104A) having an output configured to be coupled to a first memory circuit (106A) from a plurality of memory circuits (106A, 106B, 106C), the converter circuitry (104A) configured to: receive a first instruction formatted with a unified protocol; and convert the first instruction from the unified protocol to a protocol specific to the first memory circuit (106A); logic circuitry (108) having an input configured to be coupled to the first memory circuitry (106A), the logic circuitry (108) configured to: receive a first result of the first instruction from the first memory circuitry (106A); and in response to the second instruction, combining the first result with other results from a memory circuit of the plurality of memory circuits (106B, 106C) into an output.
一种示例设备(100)包括：转换器电路系统(104A)，该转换器电路系统(104A)具有被配置为耦合到来自多个存储器电路(106A、106B、106C)的第一存储器电路(106A)的输出，转换器电路系统(104A)被配置为：接收用统一协议格式化的第一指令；并且将第一指令从统一协议转换为特定于第一存储器电路(106A)的协议；逻辑电路系统(108)，该逻辑电路系统(108)具有被配置为耦合到</abstract><oa>free_for_read</oa></addata></record> |
| fulltext | fulltext_linktorsrc |
| identifier | |
| ispartof | |
| issn | |
| language | chi ; eng |
| recordid | cdi_epo_espacenet_CN118591842A |
| source | esp@cenet |
| subjects | INFORMATION STORAGE PHYSICS STATIC STORES |
| title | METHOD AND APPARATUS FOR CHARACTERIZING MEMORY |
| url | https://sfx.bib-bvb.de/sfx_tum?ctx_ver=Z39.88-2004&ctx_enc=info:ofi/enc:UTF-8&ctx_tim=2025-01-16T08%3A33%3A13IST&url_ver=Z39.88-2004&url_ctx_fmt=infofi/fmt:kev:mtx:ctx&rfr_id=info:sid/primo.exlibrisgroup.com:primo3-Article-epo_EVB&rft_val_fmt=info:ofi/fmt:kev:mtx:patent&rft.genre=patent&rft.au=VARADARAJAN%20DEVANATHAN&rft.date=2024-09-03&rft_id=info:doi/&rft_dat=%3Cepo_EVB%3ECN118591842A%3C/epo_EVB%3E%3Curl%3E%3C/url%3E&disable_directlink=true&sfx.directlink=off&sfx.report_link=0&rft_id=info:oai/&rft_id=info:pmid/&rfr_iscdi=true |