METHOD AND APPARATUS FOR CHARACTERIZING MEMORY

An example apparatus (100) includes converter circuitry (104A) having an output configured to be coupled to a first memory circuit (106A) from a plurality of memory circuits (106A, 106B, 106C), the converter circuitry (104A) configured to: receive a first instruction formatted with a unified protoco...

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1. Verfasser: VARADARAJAN DEVANATHAN
Format: Patent
Sprache:chi ; eng
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Zusammenfassung:An example apparatus (100) includes converter circuitry (104A) having an output configured to be coupled to a first memory circuit (106A) from a plurality of memory circuits (106A, 106B, 106C), the converter circuitry (104A) configured to: receive a first instruction formatted with a unified protocol; and convert the first instruction from the unified protocol to a protocol specific to the first memory circuit (106A); logic circuitry (108) having an input configured to be coupled to the first memory circuitry (106A), the logic circuitry (108) configured to: receive a first result of the first instruction from the first memory circuitry (106A); and in response to the second instruction, combining the first result with other results from a memory circuit of the plurality of memory circuits (106B, 106C) into an output. 一种示例设备(100)包括:转换器电路系统(104A),该转换器电路系统(104A)具有被配置为耦合到来自多个存储器电路(106A、106B、106C)的第一存储器电路(106A)的输出,转换器电路系统(104A)被配置为:接收用统一协议格式化的第一指令;并且将第一指令从统一协议转换为特定于第一存储器电路(106A)的协议;逻辑电路系统(108),该逻辑电路系统(108)具有被配置为耦合到