Preparation method of low-on-resistance trench gate super-junction silicon carbide VDMOS

The invention provides a preparation method of a low-on-resistance trench gate super-junction silicon carbide VDMOS (Vertical Double-diffused Metal Oxide Semiconductor), which comprises the following steps of: depositing metal on the lower side surface of a silicon carbide substrate to form a drain metal layer; epitaxially growing on the upper side surface of the silicon carbide substrate to form a drift layer; forming a super junction structure layer, a well region, a P-type source region and an N-type source region through a barrier layer, an etching resistor and ion implantation; the original barrier layer is removed, the barrier layer is formed again, the barrier layer, the drift layer and the well region are etched, a through hole is formed, then dry oxygen oxidation is carried out to form a gate dielectric layer, the bottom of the gate dielectric layer is connected to the upper side face of the drift layer, and a groove is formed in the gate dielectric layer; through the barrier layer, etching, metal de