Yield testing method for reliability of screening gate dielectric layer

The invention provides a yield test method for screening gate dielectric layer reliability, comprising the following steps: providing a wafer, forming a plurality of dies on the wafer, each die having a corresponding chip grouping number, at least forming one PUMP circuit on each die, each PUMP circuit having at least one capacitor structure, each capacitor structure comprising a gate dielectric layer and a gate layer which are sequentially formed on a substrate; selecting a PUMP circuit to be tested, and setting a high-voltage analog quantity and a test mode of the PUMP circuit; applying a voltage value to each to-be-tested PUMP circuit to the maximum value of the corresponding high-voltage analog quantity, and continuing for a preset time; acquiring a test result of the to-be-tested PUMP circuit, and judging whether the test result exceeds the card control specification or not; and if yes, marking that the chip has a reliability risk and outputting a corresponding chip grouping number. According to the inve