Memory management communication interface oriented to network-on-chip and DDR (Double Data Rate) controller
The invention relates to the technical field of integrated circuits, in particular to a memory management communication interface oriented to a network-on-chip and a DDR controller. The memory management communication interface is connected with a host through an on-chip network and is connected wit...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to the technical field of integrated circuits, in particular to a memory management communication interface oriented to a network-on-chip and a DDR controller. The memory management communication interface is connected with a host through an on-chip network and is connected with DDR storage particles through a DDR controller; the memory management communication interface comprises a request processing module used for receiving a request packet from a host through a network-on-chip and verifying the integrity of the data format of the request packet; the response processing module is used for sending an ID unlocking request to the request processing module; the output control module is used for receiving a read confirmation packet from the request processing module and a response packet from the response processing module; the processing module is also used for processing the condition of simultaneously receiving the read confirmation packet and the response packet; according to the inven |
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