On-chip memory access control structure and method supporting multi-body concurrent access, SoC chip and readable storage medium

The invention belongs to the technical field of memories, and relates to an on-chip memory access control structure supporting multi-body concurrent access, double-body RAM control is adopted, and each single RAM control part comprises a single RAM access control structure and a parallel access detection structure; the parallel access detection structure comprises an address detection mechanism and a read-write conflict detection mechanism, and can realize multi-body concurrent access for the access control structures of the two single RAMs on the premise of no address conflict and no read-write conflict. A single RAM is divided into double RAMs, the increased storage bandwidth can be matched with bandwidth matching brought by bus parallel read-write, and only address space hit judgment and read-write mutual exclusion need to be increased. The scheme has the characteristic of low resource overhead, can be applied to the on-chip RAM design of the current AXI interface, and has relatively high application value