Chip packaging method and chip packaging structure

Chip packaging method and chip packaging structure

A packaging method of a chip (30) comprises the following steps: providing a carrier plate (10) which comprises a base body (11) and a plurality of first bonding pads (13) arranged on the base body (11), and forming first solder paste (15) on each first bonding pad (13); a positioning column (20) is...

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Hauptverfasser: HUANG ZHIYONG, LIN YUANYU
Format: Patent
Sprache:chi ; eng
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BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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creator HUANG ZHIYONG
LIN YUANYU
description A packaging method of a chip (30) comprises the following steps: providing a carrier plate (10) which comprises a base body (11) and a plurality of first bonding pads (13) arranged on the base body (11), and forming first solder paste (15) on each first bonding pad (13); a positioning column (20) is formed on the surface, provided with the first bonding pad (13), of the base body (11); a chip (30) is provided, the chip (30) comprises a chip body (31) and a plurality of second bonding pads (33) arranged on one surface of the chip body (31), and second solder paste (35) is formed on each second bonding pad (33); a groove (32) is formed in the surface, provided with the second bonding pad (33), of the chip body (31); the positioning columns (20) are accommodated in the grooves (32), each first solder paste (15) is connected with each corresponding second solder paste (35), and the first solder paste (15) and the second solder paste (35) are melted and then solidified to form solder balls (40) which are connected
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a positioning column (20) is formed on the surface, provided with the first bonding pad (13), of the base body (11); a chip (30) is provided, the chip (30) comprises a chip body (31) and a plurality of second bonding pads (33) arranged on one surface of the chip body (31), and second solder paste (35) is formed on each second bonding pad (33); a groove (32) is formed in the surface, provided with the second bonding pad (33), of the chip body (31); the positioning columns (20) are accommodated in the grooves (32), each first solder paste (15) is connected with each corresponding second solder paste (35), and the first solder paste (15) and the second solder paste (35) are melted and then solidified to form solder balls (40) which are connected</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240823&amp;DB=EPODOC&amp;CC=CN&amp;NR=118541797A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,308,776,881,25544,76293</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&amp;date=20240823&amp;DB=EPODOC&amp;CC=CN&amp;NR=118541797A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HUANG ZHIYONG</creatorcontrib><creatorcontrib>LIN YUANYU</creatorcontrib><title>Chip packaging method and chip packaging structure</title><description>A packaging method of a chip (30) comprises the following steps: providing a carrier plate (10) which comprises a base body (11) and a plurality of first bonding pads (13) arranged on the base body (11), and forming first solder paste (15) on each first bonding pad (13); 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subjects BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
title Chip packaging method and chip packaging structure
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