High-speed differential ROM

A semiconductor device (100) includes a ROM (102), a differential sense amplifier (120), and a multiplexer logic circuit (110). The ROM (102) has memory cells (104) in rows along a word line (108) and columns along a bit line (106), and a reference column having reference transistors (119) along a reference bit line (117). The multiplexer logic circuit (110) couples a select bit line (106) to a first differential amplifier input (122) and the reference bit line (117) to a second differential amplifier input (124), and controls a reference current of the reference bit line (117) between a first bit line current of a programmed memory cell (104) and a second bit line current of an unprogrammed memory cell (104). 一种半导体装置(100)包含ROM(102)、差分感测放大器(120)和多路复用器逻辑电路(110)。所述ROM(102)具有成沿着字线(108)的行和沿着位线(106)的列的存储器单元(104)，和具有沿着参考位线(117)的参考晶体管(119)的参考列。所述多路复用器逻辑电路(110)将选定位线(106)耦合到第一差分放大器输入(122)且将所述参考位线(117)耦合到第二差分放大器输入(124)，且将所述参考位线(117)的参考电流控制在经编程存储器单元(104)的第一位线电流与未经编程存储器单元(104)的第二位线电流之间。