Stacked device structure and forming method thereof
Dipole engineering techniques are disclosed that incorporate dipole dopants and/or nitrogen into a gate dielectric (e.g., its high-k dielectric layer) to achieve multi-threshold voltage transistor adjustment of a transistor. Dipole engineering techniques include: (1) forming a dipole dopant source l...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | Dipole engineering techniques are disclosed that incorporate dipole dopants and/or nitrogen into a gate dielectric (e.g., its high-k dielectric layer) to achieve multi-threshold voltage transistor adjustment of a transistor. Dipole engineering techniques include: (1) forming a dipole dopant source layer over gate dielectrics of some transistors (but not other transistors); (2) forming a mask over gate dielectrics of some transistors (but not other transistors); (3) implementing a nitrogen-containing thermal driving-in process; and (4) removing the dipole dopant source layer and the mask after the nitrogen-containing thermal drive-in process. A nitrogen-containing thermal drive-in process diffuses nitrogen and dipole dopants (n dipole dopants and/or p dipole dopants) into an unmasked gate dielectric on which a dipole dopant source layer is formed, diffuses nitrogen into the unmasked gate dielectric, and diffuses dipole dopants into a masked gate dielectric on which a dipole dopant source layer is formed. The m |
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