SEMICONDUCTOR MEMORY DEVICE

According to one embodiment, a semiconductor memory device includes: a plurality of conductor layers provided apart from each other in a Z direction and including a first conductor layer (SGD); a plurality of memory pillars (MP) penetrating the plurality of conductor layers and extending in the Z direction; and a member (SLT) that includes a first portion (DT) extending in the X direction and a plurality of second portions (RT) provided separately from each other on the upper layer side of the plurality of conductor layers in the X direction, and that divides the plurality of conductor layers in the Y direction. The lower surface of the second portion (RT) is located below the upper surface of the first conductor layer (SGD), and the upper surface of each of the plurality of second portions (RT) is wider than the lower surface of each of the plurality of second portions (RT) and the first portion (DT) with respect to the width of the member (SLT) in the Y direction. 实施方式的半导体存储装置具备：多个导电体层，在Z方向上彼此分开设置，包含第1导电体层(