Wafer level package with peripheral wall protection and manufacturing method thereof

A wafer level package with peripheral wall protection includes a die having a top surface, a bottom surface and a peripheral wall and formed with a recess surrounding the peripheral wall, a plurality of conductive bumps disposed on at least one of the top surface and the bottom surface of the die, and a protective layer disposed on the top surface and the bottom surface of the die, the conductive bumps being disposed on the top surface and the bottom surface of the die, and the protective layer being disposed on the top surface and the bottom surface of the die. The protective layer covers the crystal grain, the groove and the plurality of conductive bumps, and the plurality of conductive bumps are exposed out of the protective layer. 本发明关于一种具周壁保护的晶圆级封装件及其制法，该晶圆级封装件包含一晶粒、多个导电凸块与一保护层，该晶粒具有一顶面、一底面与一周壁，且形成有环绕该周壁的一凹槽，该多个导电凸块设置于该晶粒的顶面及底面中的至少一者，该保护层包覆该晶粒、该凹槽与该多个导电凸块，该多个导电凸块外露于该保护层。