Power device optimized terminal structure and manufacturing method thereof
The invention discloses a power device optimized terminal structure and a manufacturing method thereof. The power device optimized terminal structure comprises a substrate, an epitaxial layer, a main junction, a ring region, a deep ring region, a groove, a passivation layer, an anode electrode and a...
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| creator | HUANG RUNHUA ZHANG YUE BAI SONG YANG YONG |
| description | The invention discloses a power device optimized terminal structure and a manufacturing method thereof. The power device optimized terminal structure comprises a substrate, an epitaxial layer, a main junction, a ring region, a deep ring region, a groove, a passivation layer, an anode electrode and a cathode electrode. M ring regions distributed at intervals and M-1 deep ring regions distributed at intervals are formed in a terminal region of the power device, depletion is assisted by the deep ring regions, the protection effect of a field limiting ring structure is effectively improved, the area of the terminal region is remarkably reduced, meanwhile, a peak electric field at a main junction is effectively reduced, and the withstand voltage of the device is ensured. The invention also discloses a manufacturing method of the device structure.
本发明公开了一种功率器件优化终端结构及其制造方法，该功率器件优化终端结构包括衬底、外延层、主结、环区、深环区、沟槽、钝化层、阳极电极和阴极电极。于功率器件的终端区形成M个间隔分布的环区和M-1个间隔分布的深环区，通过深环区辅助耗尽，有效提升场限环结构的保护效果，在显著减小终端区面积的同时，有效降低主结处峰值电场，保证器件耐压。本发明同时公 |
| format | Patent |
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本发明公开了一种功率器件优化终端结构及其制造方法，该功率器件优化终端结构包括衬底、外延层、主结、环区、深环区、沟槽、钝化层、阳极电极和阴极电极。于功率器件的终端区形成M个间隔分布的环区和M-1个间隔分布的深环区，通过深环区辅助耗尽，有效提升场限环结构的保护效果，在显著减小终端区面积的同时，有效降低主结处峰值电场，保证器件耐压。本发明同时公</description><language>chi ; eng</language><subject>BASIC ELECTRIC ELEMENTS ; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ; ELECTRICITY ; SEMICONDUCTOR DEVICES</subject><creationdate>2024</creationdate><oa>free_for_read</oa><woscitedreferencessubscribed>false</woscitedreferencessubscribed></display><links><openurl>$$Topenurl_article</openurl><openurlfulltext>$$Topenurlfull_article</openurlfulltext><thumbnail>$$Tsyndetics_thumb_exl</thumbnail><linktohtml>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240809&DB=EPODOC&CC=CN&NR=118472014A$$EHTML$$P50$$Gepo$$Hfree_for_read</linktohtml><link.rule.ids>230,309,781,886,25569,76552</link.rule.ids><linktorsrc>$$Uhttps://worldwide.espacenet.com/publicationDetails/biblio?FT=D&date=20240809&DB=EPODOC&CC=CN&NR=118472014A$$EView_record_in_European_Patent_Office$$FView_record_in_$$GEuropean_Patent_Office$$Hfree_for_read</linktorsrc></links><search><creatorcontrib>HUANG RUNHUA</creatorcontrib><creatorcontrib>ZHANG YUE</creatorcontrib><creatorcontrib>BAI SONG</creatorcontrib><creatorcontrib>YANG YONG</creatorcontrib><title>Power device optimized terminal structure and manufacturing method thereof</title><description>The invention discloses a power device optimized terminal structure and a manufacturing method thereof. The power device optimized terminal structure comprises a substrate, an epitaxial layer, a main junction, a ring region, a deep ring region, a groove, a passivation layer, an anode electrode and a cathode electrode. M ring regions distributed at intervals and M-1 deep ring regions distributed at intervals are formed in a terminal region of the power device, depletion is assisted by the deep ring regions, the protection effect of a field limiting ring structure is effectively improved, the area of the terminal region is remarkably reduced, meanwhile, a peak electric field at a main junction is effectively reduced, and the withstand voltage of the device is ensured. The invention also discloses a manufacturing method of the device structure.
本发明公开了一种功率器件优化终端结构及其制造方法，该功率器件优化终端结构包括衬底、外延层、主结、环区、深环区、沟槽、钝化层、阳极电极和阴极电极。于功率器件的终端区形成M个间隔分布的环区和M-1个间隔分布的深环区，通过深环区辅助耗尽，有效提升场限环结构的保护效果，在显著减小终端区面积的同时，有效降低主结处峰值电场，保证器件耐压。本发明同时公</description><subject>BASIC ELECTRIC ELEMENTS</subject><subject>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</subject><subject>ELECTRICITY</subject><subject>SEMICONDUCTOR DEVICES</subject><fulltext>true</fulltext><rsrctype>patent</rsrctype><creationdate>2024</creationdate><recordtype>patent</recordtype><sourceid>EVB</sourceid><recordid>eNrjZPAKyC9PLVJISS3LTE5VyC8oyczNrEpNUShJLcrNzEvMUSguKSpNLiktSlVIzEtRyE3MK01LBPEz89IVclNLMvKBajNSi1Lz03gYWNMSc4pTeaE0N4Oim2uIs4duakF-fGpxQWJyal5qSbyzn6GhhYm5kYGhiaMxMWoAhrw13Q</recordid><startdate>20240809</startdate><enddate>20240809</enddate><creator>HUANG RUNHUA</creator><creator>ZHANG YUE</creator><creator>BAI SONG</creator><creator>YANG YONG</creator><scope>EVB</scope></search><sort><creationdate>20240809</creationdate><title>Power device optimized terminal structure and manufacturing method thereof</title><author>HUANG RUNHUA ; ZHANG YUE ; BAI SONG ; YANG YONG</author></sort><facets><frbrtype>5</frbrtype><frbrgroupid>cdi_FETCH-epo_espacenet_CN118472014A3</frbrgroupid><rsrctype>patents</rsrctype><prefilter>patents</prefilter><language>chi ; eng</language><creationdate>2024</creationdate><topic>BASIC ELECTRIC ELEMENTS</topic><topic>ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR</topic><topic>ELECTRICITY</topic><topic>SEMICONDUCTOR DEVICES</topic><toplevel>online_resources</toplevel><creatorcontrib>HUANG RUNHUA</creatorcontrib><creatorcontrib>ZHANG YUE</creatorcontrib><creatorcontrib>BAI SONG</creatorcontrib><creatorcontrib>YANG YONG</creatorcontrib><collection>esp@cenet</collection></facets><delivery><delcategory>Remote Search Resource</delcategory><fulltext>fulltext_linktorsrc</fulltext></delivery><addata><au>HUANG RUNHUA</au><au>ZHANG YUE</au><au>BAI SONG</au><au>YANG YONG</au><format>patent</format><genre>patent</genre><ristype>GEN</ristype><title>Power device optimized terminal structure and manufacturing method thereof</title><date>2024-08-09</date><risdate>2024</risdate><abstract>The invention discloses a power device optimized terminal structure and a manufacturing method thereof. The power device optimized terminal structure comprises a substrate, an epitaxial layer, a main junction, a ring region, a deep ring region, a groove, a passivation layer, an anode electrode and a cathode electrode. M ring regions distributed at intervals and M-1 deep ring regions distributed at intervals are formed in a terminal region of the power device, depletion is assisted by the deep ring regions, the protection effect of a field limiting ring structure is effectively improved, the area of the terminal region is remarkably reduced, meanwhile, a peak electric field at a main junction is effectively reduced, and the withstand voltage of the device is ensured. The invention also discloses a manufacturing method of the device structure.
本发明公开了一种功率器件优化终端结构及其制造方法，该功率器件优化终端结构包括衬底、外延层、主结、环区、深环区、沟槽、钝化层、阳极电极和阴极电极。于功率器件的终端区形成M个间隔分布的环区和M-1个间隔分布的深环区，通过深环区辅助耗尽，有效提升场限环结构的保护效果，在显著减小终端区面积的同时，有效降低主结处峰值电场，保证器件耐压。本发明同时公</abstract><oa>free_for_read</oa></addata></record> |
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| subjects | BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY SEMICONDUCTOR DEVICES |
| title | Power device optimized terminal structure and manufacturing method thereof |
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