Apparatus, method and system for calibrating read voltage of read memory cell

Apparatuses, methods, and systems for calibrating read voltage levels of memory cells of a read memory are disclosed herein. The calibration circuit includes a reference cell associated with a predefined programming state of the reference cell. The calibration circuit further includes a read circuit configured to perform a read operation on the reference cell at a reference read voltage level (e.g., until a read state of the reference cell matches a predefined programming state) to obtain a read state of the reference cell, and adjust the reference read voltage level to an adjusted reference read voltage level based on a comparison between the read state and a predefined programming state. The read circuit is configured to provide the adjusted reference read voltage level to the memory as a read voltage level for reading memory cells of the memory. 本文公开了用于校准读取存储器的存储器单元的读取电压电平的设备、方法和系统。校准电路包括与参考单元的预定义的编程状态相关联的参考单元。校准电路还包括读取电路，该读取电路被配置为(例如，直到参考单元的读取状态与预定义的编程状态匹配)在参考读取电压电平处对参考单元执行读取操作以获得参考单元的读取状态，并基于读取状态和预定义的编程状