Shallow isolation groove manufacturing method for improving radiation resistance of device
The invention relates to a shallow isolation groove manufacturing method for improving the radiation resistance of a device, in the shallow isolation groove manufacturing method, a newly-added process is designed to be compatible with an existing production process flow, and the shallow isolation gr...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention relates to a shallow isolation groove manufacturing method for improving the radiation resistance of a device, in the shallow isolation groove manufacturing method, a newly-added process is designed to be compatible with an existing production process flow, and the shallow isolation groove manufacturing method comprises the steps that a P-type Si substrate is provided, and a masking layer is formed on the P-type Si substrate; etching the P-type Si substrate which is not covered by the masking layer to form a shallow isolation groove; growing a medium buffer layer in the shallow isolation groove; an impurity doped Si nanocrystalline layer is deposited on the medium buffer layer; a SiO2 dielectric layer is deposited in the shallow isolation groove in an HDP mode, and the shallow isolation groove is filled with the SiO2 dielectric layer; and planarizing the SiO2 dielectric layer, the Si nanocrystalline layer and the dielectric buffer layer until the masking layer is exposed. According to the manufa |
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