PNPN type nanoscale thyristor and preparation method thereof
The invention discloses a PNPN type nanoscale thyristor and a preparation method thereof, and belongs to the technical field of thyristors, the nanoscale thyristor with four PNPN doped region structures comprises an N2-Si region, a P2-Zn region, an N1-Si region and a P1-Zn region which are distribut...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a PNPN type nanoscale thyristor and a preparation method thereof, and belongs to the technical field of thyristors, the nanoscale thyristor with four PNPN doped region structures comprises an N2-Si region, a P2-Zn region, an N1-Si region and a P1-Zn region which are distributed from top to bottom along an InAs nanowire, an anode is formed at the upper end of the P1-Zn region, a cathode is formed at the lower end of the N2-Si region, and a grid is formed at the side edge of the P2-Zn region; according to the preparation method, one-time independent growth forming of wurtzite and sphalerite crystal phase regions with different lengths in the InAs nanowire is controlled by adopting a gas source control method, and high-temperature P-type doping and low-temperature N-type doping are respectively carried out in different crystal phase regions of the InAs nanowire by utilizing a high-low temperature mixed crystal doping method. The thyristor provided by the invention has smaller size and low |
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