EMMC chip aging test circuit and control method and test system thereof

The invention discloses an EMMC chip aging test circuit, a control method thereof and a test system, and relates to the technical field of chip aging test. The EMMC chip aging test circuit comprises a mother board which comprises a first input end, a second input end, a first output end and a second output end; the direct-current power supply is connected with the first input end through the first switch module; the firmware burning board is connected with the second input end through the second switch module; the daughter board comprises an EMMC chip, an SPI chip, a slow start switch module connected between the first output end and the EMMC chip, a third switch module connected between the first output end and the SPI chip, and a diode; the cathode of the diode is connected with the SPI chip, and the anode of the diode is connected with the second output end and the third switch module. The controller is in communication connection with the first switch module and the second switch module. The power supply