Packaging structure of high-power semiconductor module with multiple chips connected in parallel
The invention discloses a packaging structure of a high-power semiconductor module with multiple chips connected in parallel. The packaging structure of the high-power semiconductor module with the multiple chips connected in parallel comprises an insulating cooling fin assembly, the chips and a met...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | The invention discloses a packaging structure of a high-power semiconductor module with multiple chips connected in parallel. The packaging structure of the high-power semiconductor module with the multiple chips connected in parallel comprises an insulating cooling fin assembly, the chips and a metal lead frame assembly. The insulating cooling fin assembly comprises an insulating layer, an inner metal conductive layer and an outer metal conductive layer. A channel is arranged on the inner metal conducting layer in an etching mode, and the channel divides the inner metal conducting layer into a silver-plated sintering chip area, a pin signal area and a pin input area. The metal lead frame assembly comprises a pin output part, a pin signal part and a pin input part. And a plurality of welding parts which are arranged side by side extend out of one end of the pin output part. The welding part is located above the chip, and a welding groove attached to the chip is formed in the position, passing through the chip |
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