Addressing method of memory system, addressing circuit and memory addressing system
A method for flexible library addressing in computations in digital memory (DCIM). The method includes providing bank groups, each of the plurality of bank groups including a respective number of memory banks, each memory bank configured to store a corresponding portion of input feature map data. Th...
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Format: | Patent |
Sprache: | chi ; eng |
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Zusammenfassung: | A method for flexible library addressing in computations in digital memory (DCIM). The method includes providing bank groups, each of the plurality of bank groups including a respective number of memory banks, each memory bank configured to store a corresponding portion of input feature map data. The method includes, during a first clock cycle, reading a first portion of the input feature map data from a first library group of the plurality of library groups, and reading a second portion of the input feature map data from a second library group of the plurality of library groups. The method includes performing a first multiply-accumulate operation using a first portion of the read input feature map data and a second portion of the read input feature map data. The method includes reading a third portion of the input feature map data from the first library group during a second clock period. The method includes performing a second multiply-accumulate operation using the second portion and the third portion. The |
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