Phase-locked loop device

The invention provides a phase-locked loop device. The phase-locked loop device comprises a frequency-locked loop circuit and a phase-locked loop circuit. The frequency-locked loop circuit includes a delay generation circuit and a frequency phase detector. The delay generation circuit generates a ramp signal according to a feedback clock signal, and compares the ramp signal with a plurality of reference voltages to generate a plurality of feedback delay clock signals. The frequency phase detector has a dead zone control mechanism, generates a locking signal according to the phases of the reference clock signal and the feedback delay clock signal, and automatically switches on and off a dead zone. The phase-locked loop circuit generates a first output current according to a phase difference between a reference clock signal and a feedback clock signal. 本发明提供一种锁相环装置。锁相环装置包括锁频环电路以及锁相环电路。锁频环电路包括延迟产生电路以及频相检测器。延迟产生电路根据反馈时钟信号产生斜坡信号，使斜坡信号与多个参考电压比较以产生多个反馈延迟时钟信号。频相检测器具有死区控制机制，根据参考时钟信号与反馈延迟时钟信号的相位以产生锁定信号，并自动开关死区。锁相环电路根据参